EUCLYD raises more than €200 million in a Series A for AI silicon
The chip company combines programmable compute, processor-memory co-design and data-centre systems to target the power and infrastructure costs of AI inference.
Optimising the whole inference stack
EUCLYD is designing programmable ASICs alongside memory architecture and datacentre systems. By coordinating those layers, it aims to reduce bottlenecks and improve the efficiency of complete AI inference systems rather than treating the accelerator as a standalone component.
From silicon roadmap to AI infrastructure
Its roadmap includes craftwerk, an agentic AI silicon platform, and the CWS 32 AI-factory system. Both remain development programs as the company targets enterprise, hyperscale and sovereign-computing markets.
Use of funds
Expand engineering
Advance the silicon and systems roadmap
Build ecosystem partnerships
Prepare commercial deployment